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|
59.
|
|
|
'LSL' operator not allowed
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:3074
|
|
|
60.
|
|
|
W register expected
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:3095
|
|
|
61.
|
|
|
shift operator expected
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:3106
|
|
|
62.
|
|
|
'ROR' operator not allowed
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:3113
|
|
|
63.
|
|
|
reading from a write-only register
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:4525
|
|
|
64.
|
|
|
writing to a read-only register
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:4527
|
|
|
65.
|
|
|
the three register operands must be distinct from one another
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:6166
|
|
|
66.
|
|
|
destination register differs from preceding instruction
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:6277
|
|
|
67.
|
|
|
source register differs from preceding instruction
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:6280
|
|
|
68.
|
|
|
size register differs from preceding instruction
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:6283
|
