|
57.
|
|
|
extend operator expected
|
|
|
|
extend operator expected
|
|
Translated and reviewed by
Jared Norris
|
|
|
|
Located in
aarch64-opc.c:3055
|
|
58.
|
|
|
missing extend operator
|
|
|
|
missing extend operator
|
|
Translated and reviewed by
Jared Norris
|
|
|
|
Located in
aarch64-opc.c:3068
|
|
59.
|
|
|
'LSL' operator not allowed
|
|
|
|
'LSL' operator not allowed
|
|
Translated and reviewed by
Jared Norris
|
|
|
|
Located in
aarch64-opc.c:3074
|
|
60.
|
|
|
W register expected
|
|
|
|
W register expected
|
|
Translated and reviewed by
Jared Norris
|
|
|
|
Located in
aarch64-opc.c:3095
|
|
61.
|
|
|
shift operator expected
|
|
|
|
shift operator expected
|
|
Translated and reviewed by
Jared Norris
|
|
|
|
Located in
aarch64-opc.c:3106
|
|
62.
|
|
|
'ROR' operator not allowed
|
|
|
|
'ROR' operator not allowed
|
|
Translated and reviewed by
Jared Norris
|
|
|
|
Located in
aarch64-opc.c:3113
|
|
63.
|
|
|
reading from a write-only register
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:4525
|
|
64.
|
|
|
writing to a read-only register
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:4527
|
|
65.
|
|
|
the three register operands must be distinct from one another
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:6166
|
|
66.
|
|
|
destination register differs from preceding instruction
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:6277
|