|
86.
|
|
|
Recognize single precision FPU instructions.
|
|
|
|
(no translation yet)
|
|
|
|
Located in
arc-dis.c:1501
|
|
87.
|
|
|
Recognize double precision FPU instructions.
|
|
|
|
(no translation yet)
|
|
|
|
Located in
arc-dis.c:1503
|
|
88.
|
|
|
Recognize NPS400 instructions.
|
|
|
|
(no translation yet)
|
|
|
|
Located in
arc-dis.c:1505
|
|
89.
|
|
|
Use only hexadecimal number to print immediates.
|
|
|
|
(no translation yet)
|
|
|
|
Located in
arc-dis.c:1507
|
|
90.
|
|
|
The following ARC specific disassembler options are supported for use
with the -M switch (multiple options should be separated by commas):
|
|
|
represents a line break.
Start a new line in the equivalent position in the translation.
|
|
|
represents a space character.
Enter a space in the equivalent position in the translation.
|
|
|
|
(no translation yet)
|
|
|
|
Located in
arc-dis.c:1582
|
|
91.
|
|
|
For the options above, the following values are supported for " %s ":
|
|
|
represents a line break.
Start a new line in the equivalent position in the translation.
|
|
|
represents a space character.
Enter a space in the equivalent position in the translation.
|
|
|
|
(no translation yet)
|
|
|
|
Located in
arc-dis.c:1616 mips-dis.c:2910 riscv-dis.c:1357
|
|
92.
|
|
|
|
|
|
represents a line break.
Start a new line in the equivalent position in the translation.
|
|
|
represents a space character.
Enter a space in the equivalent position in the translation.
|
|
|
|
(no translation yet)
|
|
|
|
Located in
arc-dis.c:1626
|
|
93.
|
|
|
LP_COUNT register cannot be used as destination register
|
|
|
|
LP_COUNT del registro no puede ser empleado como registro destinatario
|
|
Translated by
Fco. Javier Serrador
|
|
|
|
Located in
arc-opc.c:41 arc-opc.c:64 arc-opc.c:90 arc-opc.c:114
|
|
94.
|
|
|
cannot use odd number destination register
|
|
|
|
no puede utilizar número impar de registro destinatario
|
|
Translated by
Fco. Javier Serrador
|
|
|
|
Located in
arc-opc.c:88
|
|
95.
|
|
|
cannot use odd number source register
|
|
|
|
no puede usar un número impar de registro origen
|
|
Translated by
Fco. Javier Serrador
|
|
|
|
Located in
arc-opc.c:101 arc-opc.c:112
|