|
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51.
|
|
|
extend operator expected
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:3055
|
|
|
52.
|
|
|
missing extend operator
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:3068
|
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|
53.
|
|
|
'LSL' operator not allowed
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:3074
|
|
|
54.
|
|
|
W register expected
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:3095
|
|
|
55.
|
|
|
shift operator expected
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:3106
|
|
|
56.
|
|
|
'ROR' operator not allowed
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
aarch64-opc.c:3113
|
|
|
57.
|
|
|
branch operand unaligned
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
alpha-opc.c:154
|
|
|
58.
|
|
|
jump hint unaligned
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
alpha-opc.c:170 alpha-opc.c:186
|
|
|
59.
|
|
|
Warning: disassembly may be wrong due to guessed opcode class choice.
Use -M<class[,class]> to select the correct opcode class(es).
[tab][tab][tab][tab] |
|
|
[tab] represents a tab character.
Please write it exactly the same way, [tab], in your
translation.
|
|
|
represents a line break.
Start a new line in the equivalent position in the translation.
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
arc-dis.c:380
|
|
|
60.
|
|
|
Unrecognised disassembler CPU option: %s
|
|
|
represents a line break.
Start a new line in the equivalent position in the translation.
|
|
|
|
|
(no translation yet)
|
|
|
|
Located in
arc-dis.c:823
|
