Scilab

Browsing Vietnamese translation

  1. Series trunk
  2. Template “scicos-blocks”
  3. Vietnamese (vi)
71 → 80 of 731 results First • • • Last
71.
Open Loop Gain
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72.
Amplitude (Volt)
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73.
non-ideal electrical switch
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74.
Resistance in On state (Ohm)
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75.
Frequency (Hz)
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76.
Set final simulation time
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77.
Final simulation time
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78.
Set Event Delay block parameters<br><br>Delay is the delay between an input event<br>&nbsp; and the generated output event.<br>Block may initially generate an output event before <br>&nbsp; any input event.<br>'Date of initial output event' gives the date of this event.<br>&nbsp; Set a negative value to mind only the input events.<br><br>
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79.
Delay
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80.
Delay must be positive
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71 → 80 of 731 results First • • • Last

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