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The coherent accelerator interface is designed to allow the coherent connection of accelerators (FPGAs and other devices) to a POWER system. Coherent in this context means that the accelerator and CPUs can both access system memory directly and with the same effective addresses. IBM refers to this as the Coherent Accelerator Processor Interface (CAPI). In the Linux world it is referred to by the name CXL to avoid confusion with the ISDN CAPI subsystem.